ProfileOfResearchers

163

TITLE: Parallel LDPC Decoding on the Cell/BE Processor
AUTHORS: Gabriel Falcao ; Leonel Sousa ; Vitor Silva ; Jose Marinho;
PUBLISHED: 2009, SOURCE: 4th International Conference on High Performance Embedded Architectures and Compilers in HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, PROCEEDINGS, VOLUME: 5409

INDEXED IN:

Scopus

WOS

DBLP

CrossRef: 5

IN MY:

ORCID |

164

TITLE: Preface
AUTHORS: Leonel Sousa ;
PUBLISHED: 2009, SOURCE: Euro-Par 2009 - Parallel Processing Workshops, HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Revised Selected Papers, VOLUME: 6043

INDEXED IN:

DBLP

IN MY:

165

TITLE: Residue-to-binary converters for the moduli set {22n+1-1,2 2n,2n-1}
AUTHORS: Gbolagade, KA; Chaves, R ; Sousa, L ; Cotofana, SD;
PUBLISHED: 2009, SOURCE: 2nd International Conference on Adaptive Science and Technology, ICAST 2009 in ICAST 2009 - 2nd International Conference on Adaptive Science and Technology

INDEXED IN:

Scopus

IN MY:

ORCID

166

TITLE: A parallel algorithm for advanced video motion estimation on multicore architectures
AUTHORS: Svetislav Momcilovic ; Leonel Sousa ;
PUBLISHED: 2008, SOURCE: 2nd International Conference on Complex, Intelligent and Software Intensive Systems in CISIS 2008: THE SECOND INTERNATIONAL CONFERENCE ON COMPLEX, INTELLIGENT AND SOFTWARE INTENSIVE SYSTEMS, PROCEEDINGS

INDEXED IN:

Scopus

WOS

DBLP

IN MY:

ORCID |

167

TITLE: An RNS based specific processor for Computing the Minimum Sum-of-Absolute-Differences
AUTHORS: Pedro Miguens Matutino; Leonel Sousa ;
PUBLISHED: 2008, SOURCE: 11th Euromicro Conference on Digital System Design in 11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS

INDEXED IN:

Scopus

WOS

DBLP

IN MY:

ORCID |

168

TITLE: Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units
AUTHORS: Nuno Sebastiao; Tiago Diasu; Nuno Roma ; Paulo Flores ; Leonel Sousa ;
PUBLISHED: 2008, SOURCE: 11th Euromicro Conference on Digital System Design in 11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS

INDEXED IN:

Scopus

WOS

DBLP

IN MY:

ORCID |

169

TITLE: BRAM-LUT tradeoff on a polymorphic DES design Full Text
AUTHORS: Ricardo Chaves ; Blagomir Donchev; Georgi Kuzmanov; Leonel Sousa ; Stamatis Vassiliadis;
PUBLISHED: 2008, SOURCE: 3rd International Conference on High Performance Embedded Architectures and Compilers in HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, VOLUME: 4917

INDEXED IN:

Scopus

WOS

DBLP

IN MY:

ORCID |

170

TITLE: Cost-efficient SHA hardware accelerators Full Text
AUTHORS: Ricardo Chaves ; Georgi Kuzmanov; Leonel Sousa ; Starnatis Vassiliadis;
PUBLISHED: 2008, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 16, ISSUE: 8

INDEXED IN:

Scopus

WOS

DBLP

IN MY:

ORCID |