Nuno Filipe Silva Verissimo Paulino
AuthID: R-000-DNQ
101
TÃTULO: Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver
AUTORES: Paulino, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING
AUTORES: Paulino, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING
INDEXADO EM: 
WOS
WOS NO MEU: 
ORCID
ORCID102
TÃTULO: Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance
AUTORES: Tavares, R; Vaz, B; Goes, J ; Paulino, N; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, VOLUME: 1
AUTORES: Tavares, R; Vaz, B; Goes, J ; Paulino, N; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: IEEE International Symposium on Circuits and Systems in PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, VOLUME: 1
103
TÃTULO: Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver
AUTORES: Paulina, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: Proceedings of the 2003 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 1
AUTORES: Paulina, N; Serrazina, M; Goes, J ; Steiger Garcao, A ;
PUBLICAÇÃO: 2003, FONTE: Proceedings of the 2003 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems, VOLUME: 1
INDEXADO EM: 
Scopus
Scopus104
TÃTULO: A 2.7 VCMOS IF transceiver for PHS application
AUTORES: Yin, GH; Ahmed, K; Shamlou, D; Grilo, J; Law, S; Wong, C; Paulino, N;
PUBLICAÇÃO: 1998, FONTE: Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology in 1998 5TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY PROCEEDINGS
AUTORES: Yin, GH; Ahmed, K; Shamlou, D; Grilo, J; Law, S; Wong, C; Paulino, N;
PUBLICAÇÃO: 1998, FONTE: Proceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology in 1998 5TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY PROCEEDINGS
105
TÃTULO: PROGRAMMABLE CMOS SWITCHED-CAPACITOR BIQUAD USING QUASI-PASSIVE ALGORITHMIC DACS
AUTORES: PAULINO, N; FRANCA, JE; MARTINS, FP;
PUBLICAÇÃO: 1995, FONTE: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME: 30, NÚMERO: 6
AUTORES: PAULINO, N; FRANCA, JE; MARTINS, FP;
PUBLICAÇÃO: 1995, FONTE: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOLUME: 30, NÚMERO: 6
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID106
TÃTULO: Programmable CMOS Switched-Capacitor Biquad Using Quasi-Passive Algorithmic DAC's
AUTORES: Paulino, N; J.E Franca; F.P Martins;
PUBLICAÇÃO: 1995, FONTE: IEEE Journal of Solid-State Circuits, VOLUME: 30, NÚMERO: 6
AUTORES: Paulino, N; J.E Franca; F.P Martins;
PUBLICAÇÃO: 1995, FONTE: IEEE Journal of Solid-State Circuits, VOLUME: 30, NÚMERO: 6
107
TÃTULO: CHARGE PROGRAMMING TECHNIQUES FOR SC BIQUADS
AUTORES: MARTINS, FP; PAULINO, NF; FRANCA, JE;
PUBLICAÇÃO: 1993, FONTE: 1993 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS : PROCEEDINGS, VOLS 1-4 ( ISCAS 93 )
AUTORES: MARTINS, FP; PAULINO, NF; FRANCA, JE;
PUBLICAÇÃO: 1993, FONTE: 1993 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS : PROCEEDINGS, VOLS 1-4 ( ISCAS 93 )
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID