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TÍTULO: IPU-EpiDet: Identifying Gene Interactions on Massively Parallel Graph-Based AI Accelerators
AUTORES: Nobre, Ricardo; Ilic, Aleksandar; Santander Jimenez, Sergio; Sousa, Leonel;
PUBLICAÇÃO: 2024, FONTE: International Parallel and Distributed Processing Symposium (IPDPS) in PROCEEDINGS 2024 IEEE INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM, IPDPS 2024
INDEXADO EM: Scopus WOS DBLP
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TÍTULO: Tensor-Accelerated Fourth-Order Epistasis Detection on GPUs  Full Text
AUTORES: Nobre, Ricardo; Ilic, Aleksandar; Santander Jimenez, Sergio; Sousa, Leonel ;
PUBLICAÇÃO: 2022, FONTE: 51st International Conference on Parallel Processing (ICPP) in 51ST INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, ICPP 2022
INDEXADO EM: Scopus WOS CrossRef: 1
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TÍTULO: Tensor-Accelerated Fourth-Order Epistasis Detection on GPUs
AUTORES: Ricardo Nobre; Aleksandar Ilic; Sergio Santander Jiménez; Leonel Sousa;
PUBLICAÇÃO: 2022, FONTE: Proceedings of the 51st International Conference on Parallel Processing, ICPP 2022, Bordeaux, France, 29 August 2022 - 1 September 2022
INDEXADO EM: DBLP
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TÍTULO: Retargeting Tensor Accelerators for Epistasis Detection  Full Text
AUTORES: Nobre, R; Ilic, A; Santander Jimenez, S; Sousa, L ;
PUBLICAÇÃO: 2021, FONTE: IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, VOLUME: 32, NÚMERO: 9
INDEXADO EM: WOS CrossRef: 12
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TÍTULO: Fast Heuristic-Based GPU Compiler Sequence Specialization
AUTORES: Nobre, R; Reis, L; Cardoso, JMP ;
PUBLICAÇÃO: 2019, FONTE: International European Conference on Parallel and Distributed Computing (Euro-Par) in EURO-PAR 2018: PARALLEL PROCESSING WORKSHOPS, VOLUME: 11339
INDEXADO EM: Scopus WOS DBLP CrossRef: 1
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TÍTULO: Impact of Vectorization Over 16-bit Data-Types on GPUs
AUTORES: Reis, L; Nobre, R; Cardoso, JMP ;
PUBLICAÇÃO: 2018, FONTE: 9th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures (PARMA) / 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (DITAM) in PARMA-DITAM 2018: 9TH WORKSHOP ON PARALLEL PROGRAMMING AND RUNTIME MANAGEMENT TECHNIQUES FOR MANY-CORE ARCHITECTURES AND 7TH WORKSHOP ON DESIGN TOOLS AND ARCHITECTURES FOR MULTICORE EMBEDDED COMPUTING PLATFORMS
INDEXADO EM: Scopus WOS DBLP CrossRef
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TÍTULO: Compiler Phase Ordering as an Orthogonal Approach for Reducing Energy Consumption PDF
AUTORES: Ricardo Nobre; Luís Reis; João M P Cardoso ;
PUBLICAÇÃO: 2018, FONTE: CoRR, VOLUME: abs/1807.00638
INDEXADO EM: DBLP arXiv
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TÍTULO: Improving OpenCL Performance by Specializing Compiler Phase Selection and Ordering PDF
AUTORES: Ricardo Nobre; Luís Reis; João M P Cardoso ;
PUBLICAÇÃO: 2018, FONTE: CoRR, VOLUME: abs/1810.10496
INDEXADO EM: DBLP arXiv
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TÍTULO: Impact of Compiler Phase Ordering When Targeting GPUs
AUTORES: Ricardo Nobre; Luís Reis; João M P Cardoso ;
PUBLICAÇÃO: 2017, FONTE: International Workshops on Parallel Processing, Euro-Par 2017 in Euro-Par 2017: Parallel Processing Workshops - Euro-Par 2017 International Workshops, Santiago de Compostela, Spain, August 28-29, 2017, Revised Selected Papers, VOLUME: 10659
INDEXADO EM: Scopus DBLP CrossRef: 3
Página 1 de 2. Total de resultados: 12.