Horácio Cláudio de Campos Neto
AuthID: R-000-5ZS
21
TITLE: Improving the area of fast parallel decimal multipliers Full Text
AUTHORS: Mario Vestias; Horacio Neto;
PUBLISHED: 2018, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
AUTHORS: Mario Vestias; Horacio Neto;
PUBLISHED: 2018, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
INDEXED IN: 
WOS
WOS22
TITLE: Decimal addition on FPGA based on a mixed BCD/excess-6 representation Full Text
AUTHORS: Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 55
AUTHORS: Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 55
INDEXED IN: 
Scopus WOS
Scopus WOS23
TITLE: K-means clustering on CGRA
AUTHORS: Joao D Lopes; Jose T de Sousa; Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Joao D Lopes; Jose T de Sousa; Horacio Neto; Mario Vestias;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
WOS24
TITLE: Parallel Dot-Products for Deep Learning on FPGA
AUTHORS: Mario Vestias; Rui Policarpo Duarte; Jose T de Sousa; Horacio Neto;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Mario Vestias; Rui Policarpo Duarte; Jose T de Sousa; Horacio Neto;
PUBLISHED: 2017, SOURCE: 27th International Conference on Field Programmable Logic and Applications (FPL) in 2017 27TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
WOS25
TITLE: Multi-core for K-means clustering on FPGA
AUTHORS: Canilho, J; Véstias, M; Neto, H;
PUBLISHED: 2016, SOURCE: 26th International Conference on Field-Programmable Logic and Applications, FPL 2016 in FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
AUTHORS: Canilho, J; Véstias, M; Neto, H;
PUBLISHED: 2016, SOURCE: 26th International Conference on Field-Programmable Logic and Applications, FPL 2016 in FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
INDEXED IN: Scopus
Scopus26
TITLE: Multi-Core for K-Means Clustering on FPGA
AUTHORS: Jose Canilho; Mario Vestias; Horacio Neto;
PUBLISHED: 2016, SOURCE: 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016 26TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTHORS: Jose Canilho; Mario Vestias; Horacio Neto;
PUBLISHED: 2016, SOURCE: 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016 26TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
INDEXED IN: WOS
WOS27
TITLE: XtokaxtikoX: A Stochastic Computing-Based Autonomous Cyber-Physical System
AUTHORS: Rui Policarpo Duarte; Horacio Neto; Mario Vestias;
PUBLISHED: 2016, SOURCE: IEEE International Conference on Rebooting Computing (ICRC) in 2016 IEEE INTERNATIONAL CONFERENCE ON REBOOTING COMPUTING (ICRC)
AUTHORS: Rui Policarpo Duarte; Horacio Neto; Mario Vestias;
PUBLISHED: 2016, SOURCE: IEEE International Conference on Rebooting Computing (ICRC) in 2016 IEEE INTERNATIONAL CONFERENCE ON REBOOTING COMPUTING (ICRC)
INDEXED IN: WOS
WOS28
TITLE: Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication Full Text
AUTHORS: Wilson M Jose; Ana Rita Silva; Mario P Vestias; Horacio C Neto;
PUBLISHED: 2015, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 82, ISSUE: 1
AUTHORS: Wilson M Jose; Ana Rita Silva; Mario P Vestias; Horacio C Neto;
PUBLISHED: 2015, SOURCE: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, VOLUME: 82, ISSUE: 1
INDEXED IN: Scopus WOS
Scopus WOS29
TITLE: Designing Partial Bitstreams for Multiple Xilinx FPGA Partitions
AUTHORS: Victor M G Goncalves Martins; Joao Gabriel Reis; Horacio C C Neto; Eduardo Augusto Bezerra;
PUBLISHED: 2015, SOURCE: 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) in 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
AUTHORS: Victor M G Goncalves Martins; Joao Gabriel Reis; Horacio C C Neto; Eduardo Augusto Bezerra;
PUBLISHED: 2015, SOURCE: 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) in 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
30
TITLE: A TMR Strategy with Enhanced Dependability Features Based on a Partial Reconfiguration Flow
AUTHORS: Victor M G Goncalves Martins; Paulo R C Villa; Horacio C C Neto; Eduardo Augusto Bezerra;
PUBLISHED: 2015, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI) in 2015 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, VOLUME: 07-10-July-2015
AUTHORS: Victor M G Goncalves Martins; Paulo R C Villa; Horacio C C Neto; Eduardo Augusto Bezerra;
PUBLISHED: 2015, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI) in 2015 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, VOLUME: 07-10-July-2015
