Horácio Cláudio de Campos Neto
AuthID: R-000-5ZS
21
TÃTULO: Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging
AUTORES: Cruz, H; Duarte, RP; Neto, H;
PUBLICAÇÃO: 2019, FONTE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
AUTORES: Cruz, H; Duarte, RP; Neto, H;
PUBLICAÇÃO: 2019, FONTE: 15th International Symposium on Applied Reconfigurable Computing, ARC 2019 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 11444 LNCS
22
TÃTULO: Fast convolutional neural networks in low density FPGAs using zero-skipping and weight pruning
AUTORES: Véstias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLICAÇÃO: 2019, FONTE: Electronics (Switzerland), VOLUME: 8, NÚMERO: 11
AUTORES: Véstias, MP ; Duarte, RP; de Sousa, JT; Neto, HC;
PUBLICAÇÃO: 2019, FONTE: Electronics (Switzerland), VOLUME: 8, NÚMERO: 11
23
TÃTULO: Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection
AUTORES: Cruz, H; Duarte, RP; Neto, H;
PUBLICAÇÃO: 2019, FONTE: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, VOLUME: 16, NÚMERO: 11
AUTORES: Cruz, H; Duarte, RP; Neto, H;
PUBLICAÇÃO: 2019, FONTE: JOURNAL OF AEROSPACE INFORMATION SYSTEMS, VOLUME: 16, NÚMERO: 11
24
TÃTULO: Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA
AUTORES: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLICAÇÃO: 2019, FONTE: 29th International Conference on Field-Programmable Logic and Applications (FPL) in 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTORES: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLICAÇÃO: 2019, FONTE: 29th International Conference on Field-Programmable Logic and Applications (FPL) in 2019 29TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
25
TÃTULO: kNN-STUFF: kNN STreaming Unit for Fpgas
AUTORES: Vieira, J; Duarte, RP; Neto, HC;
PUBLICAÇÃO: 2019, FONTE: IEEE ACCESS, VOLUME: 7
AUTORES: Vieira, J; Duarte, RP; Neto, HC;
PUBLICAÇÃO: 2019, FONTE: IEEE ACCESS, VOLUME: 7
26
TÃTULO: An Efficient Exact Fused Dot Product Processor in FPGA
AUTORES: Fiolhais, L; Neto, H;
PUBLICAÇÃO: 2018, FONTE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTORES: Fiolhais, L; Neto, H;
PUBLICAÇÃO: 2018, FONTE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
27
TÃTULO: Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs
AUTORES: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLICAÇÃO: 2018, FONTE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
AUTORES: Vestias, M ; Duarte, RP; de Sousa, JT; Neto, H;
PUBLICAÇÃO: 2018, FONTE: 28th International Conference on Field Programmable Logic and Applications (FPL) in 2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL)
28
TÃTULO: Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems
AUTORES: Duarte, RP; Neto, HC;
PUBLICAÇÃO: 2018, FONTE: IEEE Conference on Dependable and Secure Computing (DSC) in 2018 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTING (DSC)
AUTORES: Duarte, RP; Neto, HC;
PUBLICAÇÃO: 2018, FONTE: IEEE Conference on Dependable and Secure Computing (DSC) in 2018 IEEE CONFERENCE ON DEPENDABLE AND SECURE COMPUTING (DSC)
29
TÃTULO: Improving the area of fast parallel decimal multipliers
AUTORES: Vestias, M ; Neto, H;
PUBLICAÇÃO: 2018, FONTE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
AUTORES: Vestias, M ; Neto, H;
PUBLICAÇÃO: 2018, FONTE: MICROPROCESSORS AND MICROSYSTEMS, VOLUME: 61
30
TÃTULO: FPGA-based OpenCL accelerator for discovering temporal patterns in gene expression data using biclustering
AUTORES: Rui P Duarte; Lvaro Simes; Rui Henriques; Horácio C Neto;
PUBLICAÇÃO: 2018, FONTE: ACM International Conference Proceeding Series
AUTORES: Rui P Duarte; Lvaro Simes; Rui Henriques; Horácio C Neto;
PUBLICAÇÃO: 2018, FONTE: ACM International Conference Proceeding Series
