Horácio Cláudio de Campos Neto
AuthID: R-000-5ZS
61
TÃTULO: Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2010, FONTE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2010, FONTE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
62
TÃTULO: Data-driven regular reconfigurable arrays: Design space exploration and mapping
AUTORES: Ferreira, R; Cardoso, JMP ; Toledo, A; Neto, HC;
PUBLICAÇÃO: 2005, FONTE: 5th International Workshop on Embedded Computer Systems - Architectures, Modeling,, and Simulation in EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, VOLUME: 3553
AUTORES: Ferreira, R; Cardoso, JMP ; Toledo, A; Neto, HC;
PUBLICAÇÃO: 2005, FONTE: 5th International Workshop on Embedded Computer Systems - Architectures, Modeling,, and Simulation in EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, VOLUME: 3553
63
TÃTULO: An efficient, low resource, architecture for backpropagation neural networks
AUTORES: Domingos, PO; Neto, HC;
PUBLICAÇÃO: 2005, FONTE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
AUTORES: Domingos, PO; Neto, HC;
PUBLICAÇÃO: 2005, FONTE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005
INDEXADO EM: 
Scopus
Scopus NO MEU: 
ORCID
ORCID64
TÃTULO: An environment for exploring data-driven architectures
AUTORES: Ferreira, R; Cardoso, JMP ; Neto, HC;
PUBLICAÇÃO: 2004, FONTE: 14th International Conference on Field-Programmable Logic and Applications in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 3203
AUTORES: Ferreira, R; Cardoso, JMP ; Neto, HC;
PUBLICAÇÃO: 2004, FONTE: 14th International Conference on Field-Programmable Logic and Applications in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 3203
65
TÃTULO: A modular reconfigurable architecture for efficient fault simulation in digital circuits
AUTORES: Augusto, JS ; Almeida, CB; Neto, HCC;
PUBLICAÇÃO: 2003, FONTE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
AUTORES: Augusto, JS ; Almeida, CB; Neto, HCC;
PUBLICAÇÃO: 2003, FONTE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
66
TÃTULO: DALI: A methodology for the co-design of dataflow applications on hardware/software architectures
AUTORES: Vestias, MP ; Neto, HC;
PUBLICAÇÃO: 2003, FONTE: 16th Symposium on Integrated Circuits and Systems Design in 16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS
AUTORES: Vestias, MP ; Neto, HC;
PUBLICAÇÃO: 2003, FONTE: 16th Symposium on Integrated Circuits and Systems Design in 16TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, SBCCI 2003, PROCEEDINGS
INDEXADO EM: 
WOS
WOS67
TÃTULO: DALI: A methodology for the co-design of dataflow applications on hardware/software architectures [video encoder DSP example]
AUTORES: Véstias, MP; Neto, HC;
PUBLICAÇÃO: 2003, FONTE: 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 in Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003
AUTORES: Véstias, MP; Neto, HC;
PUBLICAÇÃO: 2003, FONTE: 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003 in Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003
INDEXADO EM: Scopus
Scopus NO MEU: ORCID
ORCID68
TÃTULO: System-level co-synthesis of dataflow dominated applications on reconfigurable hardware/software architectures Full Text
AUTORES: Vestias, MP ; Neto, HC;
PUBLICAÇÃO: 2002, FONTE: 13th IEEE International Workshop on Rapid System Prototyping in 13TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, VOLUME: 2002-January
AUTORES: Vestias, MP ; Neto, HC;
PUBLICAÇÃO: 2002, FONTE: 13th IEEE International Workshop on Rapid System Prototyping in 13TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, VOLUME: 2002-January
69
TÃTULO: Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
AUTORES: João M P Cardoso ; Horácio C Neto;
PUBLICAÇÃO: 2001, FONTE: FPL, VOLUME: 2147
AUTORES: João M P Cardoso ; Horácio C Neto;
PUBLICAÇÃO: 2001, FONTE: FPL, VOLUME: 2147
70
TÃTULO: Fast hardware compilation of behaviors into an FPGA-based dynamic reconfigurable computing system
AUTORES: Joéo M P Cardoso ; Horácio C Neto;
PUBLICAÇÃO: 1999, FONTE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
AUTORES: Joéo M P Cardoso ; Horácio C Neto;
PUBLICAÇÃO: 1999, FONTE: Proceedings - 12th Symposium on Integrated Circuits and Systems Design, SBCCI 1999
