Leonel Augusto Pires Seabra Sousa
AuthID: R-000-93B
121
TÃTULO: Multiobjective Frog-Leaping Optimization for the Study of Ancestral Relationships in Protein Data
AUTORES: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Leonel Sousa;
PUBLICAÇÃO: 2018, FONTE: IEEE Trans. Evolutionary Computation, VOLUME: 22, NÚMERO: 6
AUTORES: Sergio Santander Jiménez; Miguel A Vega Rodríguez; Leonel Sousa;
PUBLICAÇÃO: 2018, FONTE: IEEE Trans. Evolutionary Computation, VOLUME: 22, NÚMERO: 6
INDEXADO EM: 
DBLP
DBLP NO MEU: DBLP
DBLP122
TÃTULO: Phylogenetic Reconstructions Using an Indicator-Based Bat Algorithm for Multicore Processors
AUTORES: Sergio Santander Jimenez; Miguel A Vega Rodriguez; Leonel Sousa;
PUBLICAÇÃO: 2018, FONTE: IEEE International Conference on Bioinformatics and Biomedicine (BIBM) in PROCEEDINGS 2018 IEEE INTERNATIONAL CONFERENCE ON BIOINFORMATICS AND BIOMEDICINE (BIBM)
AUTORES: Sergio Santander Jimenez; Miguel A Vega Rodriguez; Leonel Sousa;
PUBLICAÇÃO: 2018, FONTE: IEEE International Conference on Bioinformatics and Biomedicine (BIBM) in PROCEEDINGS 2018 IEEE INTERNATIONAL CONFERENCE ON BIOINFORMATICS AND BIOMEDICINE (BIBM)
INDEXADO EM: 
WOS
WOS123
TÃTULO: Accelerating CNN computation: quantisation tuning and network resizing
AUTORES: Alexandre Vieira; Frederico Pratas; Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2018, FONTE: Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, ANDARE@PACT 2018, Limassol, Cyprus, November 4, 2018
AUTORES: Alexandre Vieira; Frederico Pratas; Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2018, FONTE: Proceedings of the 2nd Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, ANDARE@PACT 2018, Limassol, Cyprus, November 4, 2018
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP124
TÃTULO: Cache-Aware Roofline Model and Medical Image Processing Optimizations in GPUs
AUTORES: Estefania Serrano; Aleksandar Ilic; Leonel Sousa; Javier García Blas; Jesús Carretero;
PUBLICAÇÃO: 2018, FONTE: High Performance Computing - ISC High Performance 2018 International Workshops, Frankfurt/Main, Germany, June 28, 2018, Revised Selected Papers, VOLUME: 11203
AUTORES: Estefania Serrano; Aleksandar Ilic; Leonel Sousa; Javier García Blas; Jesús Carretero;
PUBLICAÇÃO: 2018, FONTE: High Performance Computing - ISC High Performance 2018 International Workshops, Frankfurt/Main, Germany, June 28, 2018, Revised Selected Papers, VOLUME: 11203
INDEXADO EM: DBLP
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DBLP125
TÃTULO: Cache-aware Roofline Model in Intel® Advisor
AUTORES: Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2017, FONTE: ERCIM News, VOLUME: 2017, NÚMERO: 110
AUTORES: Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2017, FONTE: ERCIM News, VOLUME: 2017, NÚMERO: 110
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP126
TÃTULO: Efficient reductions in cyclotomic rings - Application to R-LWE based FHE schemes
AUTORES: Jean Claude Bajard; Julien Eynard; Anwar Hasan; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLICAÇÃO: 2017, FONTE: IACR Cryptology ePrint Archive, VOLUME: 2017
AUTORES: Jean Claude Bajard; Julien Eynard; Anwar Hasan; Paulo Martins; Leonel Sousa; Vincent Zucca;
PUBLICAÇÃO: 2017, FONTE: IACR Cryptology ePrint Archive, VOLUME: 2017
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP127
TÃTULO: A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo 2n + 1 Multiplier
AUTORES: Seyed Mostafa Mirhosseini; Amir Sabbagh Molahosseini; Mehdi Hosseinzadeh; Leonel Sousa; Paulo Martins;
PUBLICAÇÃO: 2017, FONTE: IEEE Trans. on Circuits and Systems, VOLUME: 64, NÚMERO: 7
AUTORES: Seyed Mostafa Mirhosseini; Amir Sabbagh Molahosseini; Mehdi Hosseinzadeh; Leonel Sousa; Paulo Martins;
PUBLICAÇÃO: 2017, FONTE: IEEE Trans. on Circuits and Systems, VOLUME: 64, NÚMERO: 7
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP128
TÃTULO: Performance Analysis with Cache-Aware Roofline Model in Intel Advisor
AUTORES: Diogo Marques; Helder Duarte; Aleksandar Ilic; Leonel Sousa; Roman Belenov; Philippe Thierry; Zakhar A Matveev;
PUBLICAÇÃO: 2017, FONTE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
AUTORES: Diogo Marques; Helder Duarte; Aleksandar Ilic; Leonel Sousa; Roman Belenov; Philippe Thierry; Zakhar A Matveev;
PUBLICAÇÃO: 2017, FONTE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP129
TÃTULO: Analyzing Performance of Multi-cores and Applications with Cache-aware Roofline Model
AUTORES: Diogo Marques; Helder Duarte; Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2017, FONTE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
AUTORES: Diogo Marques; Helder Duarte; Leonel Sousa; Aleksandar Ilic;
PUBLICAÇÃO: 2017, FONTE: 2017 International Conference on High Performance Computing & Simulation, HPCS 2017, Genoa, Italy, July 17-21, 2017
INDEXADO EM: DBLP
DBLP NO MEU: DBLP
DBLP130
TÃTULO: Energy-efficient motion estimation with approximate arithmetic
AUTORES: Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto; Nuno Roma; Leonel Sousa;
PUBLICAÇÃO: 2017, FONTE: 19th IEEE International Workshop on Multimedia Signal Processing, MMSP 2017, Luton, United Kingdom, October 16-18, 2017
AUTORES: Roger Endrigo Carvalho Porto; Luciano Volcan Agostini; Bruno Zatt; Marcelo Schiavon Porto; Nuno Roma; Leonel Sousa;
PUBLICAÇÃO: 2017, FONTE: 19th IEEE International Workshop on Multimedia Signal Processing, MMSP 2017, Luton, United Kingdom, October 16-18, 2017
INDEXADO EM: DBLP
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DBLP