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Optimization of Gate-Level Area in High Throughput Multiple Constant Multiplications
AuthID
P-008-0YF
4
Author(s)
Aksoy, L
·
Costa, E
·
Flores, P
·
Monteiro, J
Document Type
Proceedings Paper
Year published
2011
Published
in
2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Pages: 588-591
Conference
2011 20Th European Conference on Circuit Theory and Design, Ecctd 2011,
Date:
29 August 2011 through 31 August 2011,
Location:
Linkoping
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®
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Publication Identifiers
DOI
:
10.1109/ecctd.2011.6043602
Scopus
: 2-s2.0-80155142979
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