Realistic Fault Extraction for High-Quality Design and Test of Vlsi Systems

AuthID
 P-001-D3Y
3
Author(s)
1
Editor(es)
Anon
Tipo de Documento
Proceedings Paper
Year published
1997
Publicado
in 1997 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, ISSN: 1063-6722
Páginas: 29-37 (9)
Conference
1997 Ieee International Symposium on Defect and Fault Tolerance in Vlsi Systems, Date: OCT 20-22, 1997, Location: PARIS, FRANCE, Patrocinadores: IEEE Comp Soc, IEEE Comp Soc Tech Comm Fault Tolerant Comp, Soc Electriciens & Electroniciens
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Publication Identifiers
SCOPUS: 2-s2.0-0031340342
Wos: WOS:A1997BJ79U00004
Source Identifiers
ISSN: 1063-6722
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