RAVEL-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation

AuthID
P-00F-NGX
4
Author(s)
Riepe, MA
·
Sakallah, KA
·
Brown, RB
Tipo de Documento
Article
Year published
1996
Publicado
in IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, ISSN: 1063-8210
Volume: 4, Número: 1, Páginas: 113-129 (17)
Indexing
Publication Identifiers
DBLP: journals/tvlsi/RiepeSSB96
SCOPUS: 2-s2.0-0030108991
Unpaywall: 10.1109/92.486085
Wos: WOS:A1996TY43100009
Source Identifiers
ISSN: 1063-8210
Export Publication Metadata
Citações
Oops! It looks like you don't have access to this content.

This section is restricted to uses with b-on access.



CORE Conference
No information about CORE Rank

During the preprocessing phase, only publications of type 'Proceedings Paper' or 'Proceedings' are automatically processed to identify their CORE Rank.

TIP: If your publication's CORE Rank is missing, you can contact with your institutional manager to have the correct ranking manually added to the record.

Journal Factors
Oops! It looks like you don't have access to this content.

This section is restricted to uses with b-on access.