Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations

AuthID
 P-00M-Y7G
6
Author(s)
Zarandi A.A.E.
·
Molahosseini A.S.
·
Hosseinzadeh M.
·
Sorouri S.
·
Antao S.
·
Tipo de Documento
Article
Year published
2015
Publicado
in IEEE Transactions on Very Large Scale Integration VLSI Systems, ISSN: 10638210
Volume: 23, Número: 2, Páginas: 374-378 (4)
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Publication Identifiers
SCOPUS: 2-s2.0-85027930038
Source Identifiers
ISSN: 10638210
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