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Design Of An Interlayer Deblocking Filter Architecture For H.264/Svc Based On A Novel Sample-Level Filtering Order

AuthID
P-005-6SG

Author(s)

Correa, G

Silva, T

Cruz, LA

Agostini, L

Editor(s)

Renfors, M; Sung, W; Takala, J; Vainio, O

Document Type

Proceedings Paper

Year published

2009

Published

in SIPS: 2009 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS in IEEE Workshop on Signal Processing Systems, ISSN: 1520-6130

Pages: 102-108 (7)

Conference

Ieee Workshop on Signal Processing Systems (Sips 2009), Date: OCT 07-09, 2009, Location: Tampere, FINLAND, Sponsors: IEEE

Indexing

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Publication Identifiers

DOI: 10.1109/sips.2009.5336233

Scopus: 2-s2.0-74549177026

Wos: WOS:000274328800019

Source Identifiers

ISSN: 1520-6130

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Design Of An Interlayer Deblocking Filter Architecture For H.264/Svc Based On A Novel Sample-Level Filtering Order

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