Computing Systems Research Lab
AuthID: I-000-BDG
Publications Actions
Publications at Authenticus Institutional Profile
An Authenticus institution (group) is an organization which consists of a set of researchers (institutional/group team). The set of researchers depends on the organizational structure of the institution per year and can be set at the institution profile, under ‘Researchers’ interface. Based on the institutional team we produce listings of publications, statistics and institutional reports.
Publications displayed at an Authenticus institutional profile depend on two parameters:
- Researchers team associated with the institution per year.
- Publications source type.
We define 3 types of publication sources:
- Validated by team members - includes all publications validated by team members. Requires the definition of the institutional team.
- All published by team members - includes all publications validated by the institution team members plus all not-validated (only identified) publications. Requires the definition of the institutional team.
- Affiliation Based - includes publications that have the institution/group in the publication affiliation. Does not require institutional team, but at the same time does not guarantee that all publications will be listed.
External
Internal
No data about last update.
Rules:
This actions updates publications citations of every team member.
Only validated by team members publications are included.
Only the current year team is included in this action.>
The action is executed in the background, thus the results are NOT immediate.
This actions can be executed only once a month!
Only validated by team members publications are included.
Only the current year team is included in this action.>
The action is executed in the background, thus the results are NOT immediate.
This actions can be executed only once a month!
No data about last update.
Rules:
This actions updates all pre print publications of the group/institution.
Only validated by current year team members publications are included.
The action is executed in the background, thus the results are NOT immediate.
This actions can be executed only once a day!
Only validated by current year team members publications are included.
The action is executed in the background, thus the results are NOT immediate.
This actions can be executed only once a day!
Publications Count: 667
9 Team MembersFilters -> Year: 2025
561
TITLE: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface
AUTHORS: Bertels, K; Cardoso, J ; Vassiliadis, S;
PUBLISHED: 2006, SOURCE: 2nd International Workshop on Applied Reconfigurable Computing, ARC 2006 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 3985 LNCS
AUTHORS: Bertels, K; Cardoso, J ; Vassiliadis, S;
PUBLISHED: 2006, SOURCE: 2nd International Workshop on Applied Reconfigurable Computing, ARC 2006 in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), VOLUME: 3985 LNCS
INDEXED IN: 
Scopus
Scopus562
TITLE: Memory parallelism using custom array mapping to heterogeneous storage structures
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2006, SOURCE: 2006 International Conference on Field Programmable Logic and Applications, FPL in Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL, PAGES: 383-388
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2006, SOURCE: 2006 International Conference on Field Programmable Logic and Applications, FPL in Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL, PAGES: 383-388
INDEXED IN: Scopus
Scopus563
TITLE: Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures
AUTHORS: Marcos Vinícius da Silva; Ricardo S Ferreira; Alisson Garcia; João M P Cardoso ;
PUBLISHED: 2006, SOURCE: 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006 in 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006, PAGES: 20-29
AUTHORS: Marcos Vinícius da Silva; Ricardo S Ferreira; Alisson Garcia; João M P Cardoso ;
PUBLISHED: 2006, SOURCE: 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006 in 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, ReConFig 2006, San Luis Potosi, Mexico, September 20-22, 2006, PAGES: 20-29
564
TITLE: Model-checking a group membership protocol for TDMA-based networks with both static and dynamic scheduling
AUTHORS: Valério Rosset; Pedro F Souto; Francisco Vasques ;
PUBLISHED: 2006
AUTHORS: Valério Rosset; Pedro F Souto; Francisco Vasques ;
PUBLISHED: 2006
INDEXED IN: 
Handle
Handle565
TITLE: Reconfigurable Computing: Architectures and Applications. Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers
AUTHORS: Koen Bertels; João M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: Lecture Notes in Computer Science
AUTHORS: Koen Bertels; João M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: Lecture Notes in Computer Science
566
TITLE: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers
AUTHORS: Koen Bertels; João M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: ARC, VOLUME: 3985
AUTHORS: Koen Bertels; João M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: ARC, VOLUME: 3985
INDEXED IN: 
DBLP
DBLP567
TITLE: Regular expression matching for reconfigurable packet inspection
AUTHORS: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 5th IEEE International Conference on Field Programmable Technology in 2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, PAGES: 119-126
AUTHORS: Joao Bispo ; Ioannis Sourdis; Joao M P Cardoso ; Stamatis Vassiliadis;
PUBLISHED: 2006, SOURCE: 5th IEEE International Conference on Field Programmable Technology in 2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, PAGES: 119-126
568
TITLE: Static scheduling of dependent parallel tasks on heterogeneous clusters
AUTHORS: Barbosa, J ; Morais, C; Nobrega, R; Monteiro, AP ;
PUBLISHED: 2006, SOURCE: IEEE International Conference on Cluster Computing in 2005 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING (CLUSTER), PAGES: 546-553
AUTHORS: Barbosa, J ; Morais, C; Nobrega, R; Monteiro, AP ;
PUBLISHED: 2006, SOURCE: IEEE International Conference on Cluster Computing in 2005 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING (CLUSTER), PAGES: 546-553
569
TITLE: XML scheme for specification of security policies
AUTHORS: Pedro Monteiro; Joao Vila Verde; Pedro Souto ;
PUBLISHED: 2006, SOURCE: 1st Iberian Conference on Information Systems and Technologies in ACTAS DA 1A CONFERENCIA IBERICA DE SISTEMAS E TECNOLOGIAS DE INFORMACAO, VOL II, VOLUME: 2, PAGES: 391-404
AUTHORS: Pedro Monteiro; Joao Vila Verde; Pedro Souto ;
PUBLISHED: 2006, SOURCE: 1st Iberian Conference on Information Systems and Technologies in ACTAS DA 1A CONFERENCIA IBERICA DE SISTEMAS E TECNOLOGIAS DE INFORMACAO, VOL II, VOLUME: 2, PAGES: 391-404
INDEXED IN: Scopus 
WOS
Scopus WOS570
TITLE: A register allocation algorithm in the presence of scalar replacement for fine-grain configurable architectures Full Text
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe, DATE '05 in Proceedings -Design, Automation and Test in Europe, DATE '05, VOLUME: I, PAGES: 6-11
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe, DATE '05 in Proceedings -Design, Automation and Test in Europe, DATE '05, VOLUME: I, PAGES: 6-11
INDEXED IN: Scopus
Scopus571
TITLE: A test infrastructure for compilers targeting FPGAs
AUTHORS: Rodrigues, RMM; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005, PAGES: 168-175
AUTHORS: Rodrigues, RMM; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: International Workshop on Applied Reconfigurable Computing 2005, ARC 2005 in ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005, PAGES: 168-175
INDEXED IN: Scopus
Scopus572
TITLE: An infrastructure to functionally test designs generated by compilers targeting FPGAs PDF Full Text
AUTHORS: Rodrigues, R; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 05) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, VOLUME: I, PAGES: 30-31
AUTHORS: Rodrigues, R; Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 05) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, VOLUME: I, PAGES: 30-31
573
TITLE: Automatic mapping of C to FPGAs with the DEFACTO compilation and synthesis system Full Text
AUTHORS: Diniz, P ; Hall, M; Park, J; So, B; Ziegler, H;
PUBLISHED: 2005, SOURCE: Microprocessors and Microsystems, VOLUME: 29, ISSUE: 2-3, PAGES: 51-62
AUTHORS: Diniz, P ; Hall, M; Park, J; So, B; Ziegler, H;
PUBLISHED: 2005, SOURCE: Microprocessors and Microsystems, VOLUME: 29, ISSUE: 2-3, PAGES: 51-62
574
TITLE: CHIADO - Compilation of high-level computationally intensive algorithms to dynamically reconfligurable computing systems
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837, PAGES: 893-901
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837, PAGES: 893-901
575
TITLE: Compilation and temporal partitioning for a coarse-grain reconfigurable architecture Full Text
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2005, SOURCE: New Algorithms, Architectures and Applications for Reconfigurable Computing, PAGES: 105-115
AUTHORS: Cardoso, JMP ; Weinhardt, M;
PUBLISHED: 2005, SOURCE: New Algorithms, Architectures and Applications for Reconfigurable Computing, PAGES: 105-115
576
TITLE: Compiler-directed design space exploration for caching and prefetching data in high-level synthesis
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: 2005 IEEE International Conference on Field Programmable Technology in Proceedings - 2005 IEEE International Conference on Field Programmable Technology, VOLUME: 2005, PAGES: 233-240
AUTHORS: Baradaran, N; Diniz, PC ;
PUBLISHED: 2005, SOURCE: 2005 IEEE International Conference on Field Programmable Technology in Proceedings - 2005 IEEE International Conference on Field Programmable Technology, VOLUME: 2005, PAGES: 233-240
INDEXED IN: Scopus
Scopus577
TITLE: Data parallel scheduling of operations in linear algebra on heterogeneous clusters
AUTHORS: Morais, C; Barbosa, J ; Tadeu, P;
PUBLISHED: 2005, SOURCE: WSEAS Transactions on Computers, VOLUME: 4, ISSUE: 10, PAGES: 1440-1448
AUTHORS: Morais, C; Barbosa, J ; Tadeu, P;
PUBLISHED: 2005, SOURCE: WSEAS Transactions on Computers, VOLUME: 4, ISSUE: 10, PAGES: 1440-1448
INDEXED IN: Scopus
Scopus578
TITLE: Data-driven array architectures: a rebirth?
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837, PAGES: 479-490
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: Conference on VLSI Circuits and Systems II in VLSI Circuits and Systems II, Pts 1 and 2, VOLUME: 5837, PAGES: 479-490
579
TITLE: Data-driven regular reconfigurable arrays: Design space exploration and mapping Full Text
AUTHORS: Ferreira, R; Cardoso, JMP ; Toledo, A; Neto, HC;
PUBLISHED: 2005, SOURCE: 5th International Workshop on Embedded Computer Systems - Architectures, Modeling,, and Simulation in EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, VOLUME: 3553, PAGES: 41-50
AUTHORS: Ferreira, R; Cardoso, JMP ; Toledo, A; Neto, HC;
PUBLISHED: 2005, SOURCE: 5th International Workshop on Embedded Computer Systems - Architectures, Modeling,, and Simulation in EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, VOLUME: 3553, PAGES: 41-50
580
TITLE: Dynamic loop pipelining in data-driven architectures
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: 2005 Computing Frontiers Conference in 2005 Computing Frontiers Conference, PAGES: 106-115
AUTHORS: Cardoso, JMP ;
PUBLISHED: 2005, SOURCE: 2005 Computing Frontiers Conference in 2005 Computing Frontiers Conference, PAGES: 106-115
