1
TITLE: Dynamic Partial Reconfiguration of Customized Single-Row Accelerators  Full Text
AUTHORS: Nuno M C Paulino ; Joao Canas Ferreira ; João M.P. Cardoso ;
SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 27, ISSUE: 1, PUBLISHED: 2019
INDEXED IN: WOS DBLP CrossRef
2
TITLE: Generation of Customized Accelerators for Loop Pipelining of Binary Instruction Traces  Full Text
AUTHORS: Nuno M C Paulino ; Joao Canas Ferreira ; João M.P. Cardoso ;
SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 25, ISSUE: 1, PUBLISHED: 2017
INDEXED IN: Scopus WOS DBLP CrossRef: 1
IN MY: ORCID
3
TITLE: On Coding Techniques for Targeting FPGAs via OpenCL
AUTHORS: Nuno Paulino ; Luís Reis; João M.P. Cardoso ;
SOURCE: Parallel Computing is Everywhere, Proceedings of the International Conference on Parallel Computing, ParCo 2017, 12-15 September 2017, Bologna, Italy, VOLUME: 32, PUBLISHED: 2017
INDEXED IN: Scopus DBLP
4
TITLE: Transparent Acceleration of Program Execution Using Reconfigurable Hardware  Full Text
AUTHORS: Nuno Paulino ; Joao Canas Ferreira ; Joao Bispo ; João M.P. Cardoso ;
SOURCE: Conference on Design Automation Test in Europe (DATE) in 2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), VOLUME: 2015-April, PUBLISHED: 2015
INDEXED IN: Scopus WOS DBLP
IN MY: ORCID
5
TITLE: Transparent runtime migration of loop-based traces of processor instructions to reconfigurable processing units  Full Text
AUTHORS: Bispo, J ; Paulino, N ; João M.P. Cardoso ; Ferreira, JC ;
SOURCE: International Journal of Reconfigurable Computing, VOLUME: 2013, PUBLISHED: 2013
INDEXED IN: Scopus DBLP CrossRef: 5
IN MY: ORCID
6
TITLE: Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems
AUTHORS: Joao Bispo ; Nuno Paulino ; João M.P. Cardoso ; Joao C Ferreira ;
SOURCE: IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOLUME: 9, ISSUE: 3, PUBLISHED: 2013
INDEXED IN: Scopus WOS DBLP CrossRef: 8
IN MY: ORCID
7
TITLE: From Instruction Traces to Specialized Reconfigurable Arrays
AUTHORS: João Bispo ; Nuno Miguel Cardanha Paulino ; João M.P. Cardoso ; João Canas Ferreira ;
SOURCE: 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011 in 2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011, PUBLISHED: 2011
INDEXED IN: Scopus DBLP CrossRef: 6
IN MY: ORCID