Improving Residue Number System Multiplication with More Balanced Moduli Sets and Enhanced Modular Arithmetic Structures

AuthID
 P-004-7SV
2
Author(s)
Document Type
Article
Year published
2007
Published
in IET COMPUTERS AND DIGITAL TECHNIQUES, ISSN: 1751-8601
Volume: 1, Issue: 5, Pages: 472-480 (9)
Conference
20Th International Conference on Design of Circuits and Integrated Systems, Date: NOV 23-25, 2005, Location: Lisbon, PORTUGAL, Sponsors: IEEE Portugal Sect, ChipIdea Microelect, Ansoft, Tecmic, INOV, Portuguese Govt Agcy, Univ Tecn Lisboa, Engn Shc, Host: Inst Super Tecn, Congress Ctr
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Dblp®/en/publications/view/139067
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Publication Identifiers
Dblp: journals/iet-cdt/ChavesS07
Scopus: 2-s2.0-34548707033
Wos: WOS:000250017300005
Source Identifiers
ISSN: 1751-8601
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