ProfileOfResearchers

TITLE: Measuring Clock-Signal Modulation Efficiency for Systems-on-Chip in Electromagnetic Interference Environment
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP ; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2009, SOURCE: 10th Latin American Test Workshop in LATW: 2009 10TH LATIN AMERICAN TEST WORKSHOP

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TITLE: Monolithic Multi-mode DC-DC Converter with Gate Voltage Optimization
AUTHORS: Nuno Dias; Marcelino Santos ; Floriberto Lima; Beatriz Borges ; Julio Paisana;
PUBLISHED: 2009, SOURCE: 18th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) in INTEGRATED CIRCUIT AND SYSTEMS DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, VOLUME: 5349

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TITLE: Noise minimization for low power bandgap reference and low dropout regulator cores
AUTHORS: Angelo, M; Santos, M ; Neves, A; Dias, N;
PUBLISHED: 2009, SOURCE: Journal of Low Power Electronics, VOLUME: 5, ISSUE: 2

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TITLE: Adjustable Low Consumption Circuit for Monitorization of Power Source Voltages in a SoC
AUTHORS: Rodrigo Duarte; Julio Paisana; Marcelino Santos ; Floriberto Lima;
PUBLISHED: 2008, SOURCE: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008) in 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4

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TITLE: Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Andina, J; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 14th IEEE International On-Line Testing Symposium in 14TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS

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TITLE: Level shifters and DCVSL for a low-voltage CMOS 4.2-v buck converter Full Text
AUTHORS: Jose F da Rocha; Marcelino B dos Santos ; Jose Dores D Costa; Floriberto A Lima;
PUBLISHED: 2008, SOURCE: IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOLUME: 55, ISSUE: 9

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TITLE: Power-Supply Instability Aware Clock Signal Modulation for Digital Integrated Circuits
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Rocha, L; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2008, SOURCE: International Symposium on Electromagnetic Compatibility in 2008 INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (EMC EUROPE)

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TITLE: Process tolerant design using thermal and power-supply tolerance in pipeline based circuits
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 11th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems in 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS

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