Ricardo Jorge Fernandes Chaves


AuthID: R-000-FCD

Publicações Confirmadas: 47



11
TÍTULO: Secure partial dynamic reconfiguration with unsecured external memory
AUTORES: Kashyap, H; Chaves, R ;
PUBLICAÇÃO: 2014, FONTE: 24th International Conference on Field Programmable Logic and Applications, FPL 2014 in Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
12
TÍTULO: Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems
AUTORES: Colaco, J; Matoga, A; Ilic, A ; Roma, N ; Tomas, P ; Chaves, R ;
PUBLICAÇÃO: 2014, FONTE: 10th International Conference on Parallel Processing and Applied Mathematics (PPAM) in PARALLEL PROCESSING AND APPLIED MATHEMATICS (PPAM 2013), PT I, VOLUME: 8384, NÚMERO: PART 1
INDEXADO EM: Scopus WOS DBLP CrossRef
NO MEU: ORCID
13
TÍTULO: A Compact and Scalable RNS Architecture  Full Text
AUTORES: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2013, FONTE: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in PROCEEDINGS OF THE 2013 IEEE 24TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP 13)
INDEXADO EM: Scopus WOS DBLP CrossRef: 2
NO MEU: ORCID
14
TÍTULO: A flexible shared library profiler for early estimation of performance gains in heterogeneous systems
AUTORES: Matoga, A; Chaves, R ; Tomas, P ; Roma, N ;
PUBLICAÇÃO: 2013, FONTE: 2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013 in Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013
INDEXADO EM: Scopus CrossRef: 1
NO MEU: ORCID
15
TÍTULO: HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels  Full Text
AUTORES: Sergio Paiagua; Frederico Pratas; Pedro Tomas ; Nuno Roma ; Ricardo Chaves ;
PUBLICAÇÃO: 2013, FONTE: 25th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD) in 2013 25TH INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD)
INDEXADO EM: Scopus WOS CrossRef: 3
NO MEU: ORCID
16
TÍTULO: Method to Design General RNS Reverse Converters for Extended Moduli Sets
AUTORES: Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2013, FONTE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, VOLUME: 60, NÚMERO: 12
INDEXADO EM: Scopus WOS DBLP CrossRef: 19
NO MEU: ORCID
17
TÍTULO: On the Design of RNS Reverse Converters for the Four-Moduli Set {2<i><SUP>n</SUP></i>+1, 2<i><SUP>n</SUP></i>-1, 2<i><SUP>n</SUP></i>, 2<SUP><i>n</i>+1</SUP>+1}  Full Text
AUTORES: Sousa, L ; Antao, S; Chaves, R ;
PUBLICAÇÃO: 2013, FONTE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 21, NÚMERO: 10
INDEXADO EM: Scopus WOS DBLP CrossRef: 25
NO MEU: ORCID
18
TÍTULO: RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8<i>n</i>+1)-bit
AUTORES: Pettenghi, H ; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2013, FONTE: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, VOLUME: 60, NÚMERO: 6
INDEXADO EM: Scopus WOS DBLP CrossRef: 38
NO MEU: ORCID
19
TÍTULO: SCALABLE AND HIGH THROUGHPUT BIOSENSING PLATFORM
AUTORES: Jose Leitao; Jose Germano; Nuno Roma ; Ricardo Chaves ; Pedro Tomas ;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXADO EM: Scopus WOS CrossRef: 3
NO MEU: ORCID
20
TÍTULO: Reconfigurable Architecture for Cryptography over Binary Finite Fields
AUTORES: Antao, S; Chaves, R ; Sousa, L ;
PUBLICAÇÃO: 2012, FONTE: Embedded Systems: Hardware, Design, and Implementation
INDEXADO EM: Scopus CrossRef
NO MEU: ORCID
Página 2 de 5. Total de resultados: 47.

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