51
TITLE: Process tolerant design using thermal and power-supply tolerance in pipeline based circuits
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, M ; Teixeira, I ; Teixeira, P;
PUBLISHED: 2008, SOURCE: 11th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems in 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef
52
TITLE: Robust Solution for Synchronous Communication among Multi Clock Domains
AUTHORS: Jorge Semião ; Varela, J ; Freijedo, J; Andina, J; Leong, C; Teixeira, JP ; Teixeira, I ;
PUBLISHED: 2008, SOURCE: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008) in 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4
INDEXED IN: Scopus WOS CrossRef
53
TITLE: Signal integrity enhancement in digital circuits  Full Text
AUTHORS: Jorge Semião ; Marcial Jesus R Rodriguez Irago; Juan J Rodriguez Andina; Leonardo Bisch Piccoli; Fabian Luis Vargas; Marcelino Bicho dos Santos ; Isabel Maria C Cacho Teixeira ; Joao Paulo Teixeira ;
PUBLISHED: 2008, SOURCE: IEEE DESIGN & TEST OF COMPUTERS, VOLUME: 25, ISSUE: 5
INDEXED IN: Scopus WOS CrossRef
54
TITLE: Time Management for Low-Power Design of Digital Systems
AUTHORS: Jorge Semião ; Freijedo, JF; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2008, SOURCE: Journal of Low Power Electronics, VOLUME: 4, ISSUE: 3
INDEXED IN: Scopus CrossRef
IN MY: ORCID
55
TITLE: Enhancing the tolerance to power-supply instability in digital circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez J R Andina; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: IEEE-Computer-Society Annual Symposium on VLSI in IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: EMERGING VLSI TECHNOLOGIES AND ARCHITECTURES
INDEXED IN: Scopus WOS CrossRef
56
TITLE: Improving the tolerance of pipeline based circuits to power supply or temperature variations
AUTHORS: Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007 in Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
INDEXED IN: Scopus CrossRef
IN MY: ORCID
57
TITLE: Improving tolerance to power-supply and temperature variations in synchronous circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodiriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 10th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems in Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
INDEXED IN: Scopus WOS CrossRef
58
TITLE: On-line dynamic delay insertion to improve signal integrity in synchronous circuits
AUTHORS: Jorge Semião ; Freijedo, J; Rodriguez Andina, JJ; Vargas, F; Santos, MB ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2007, SOURCE: 13th IEEE International On-Line Testing Symposium in 13TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef
59
TITLE: Dynamic fault detection in digital systems using dynamic voltage scaling and multi-temperature schemes
AUTHORS: Rodriguez Irago, M; Andina, JJR; Vargas, F; Jorge Semião ; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2006, SOURCE: IOLTS 2006: 12th IEEE International On-Line Testing Symposium in Proceedings - IOLTS 2006: 12th IEEE International On-Line Testing Symposium, VOLUME: 2006
INDEXED IN: Scopus CrossRef
IN MY: ORCID
60
TITLE: Functional-oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage
AUTHORS: Guerreiro, F; Jorge Semião ; Pierce, A; M.B Santos; I.M Teixeira;
PUBLISHED: 2006, SOURCE: 2006 IEEE Design and Diagnostics of Electronic Circuits and systems
INDEXED IN: CrossRef
IN MY: ORCID
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