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João Carlos Viegas Martins Bispo
AuthID:
R-000-6X6
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Document Source:
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Proceedings Paper (40)
Article (21)
Unpublished (3)
Proceedings (3)
Book Chapter (1)
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Results:
10
20
30
40
50
Confirmed Publications: 68
51
TITLE:
Multi-target c code generation from MATLAB
AUTHORS:
Bispo, J
;
Reis, L
;
Cardoso, JMP
;
PUBLISHED:
2014
,
SOURCE:
1st ACM SIGPLAN International Workshop on Libraries, Languages and Compilers for Array Programming, ARRAY 2014 - Part of PLDI 2014
in
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)
INDEXED IN:
Scopus
DBLP
CrossRef
:
5
IN MY:
ORCID
|
DBLP
52
TITLE:
Hardware pipelining of repetitive patterns in processor instruction traces
AUTHORS:
Bispo, J
;
Cardoso, JMP
;
Monteiro, J
;
PUBLISHED:
2013
,
SOURCE:
Journal of Integrated Circuits and Systems,
VOLUME:
8,
ISSUE:
1
INDEXED IN:
Scopus
IN MY:
ORCID
53
TITLE:
The MATISSE MATLAB Compiler
AUTHORS:
Joao Bispo
;
Pedro Pinto
;
Ricardo Nobre
; Tiago Carvalho;
Joao M P Cardoso
;
Pedro C Diniz
;
PUBLISHED:
2013
,
SOURCE:
11th IEEE International Conference on Industrial Informatics (INDIN)
in
2013 11TH IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL INFORMATICS (INDIN)
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
54
TITLE:
Transparent runtime migration of loop-based traces of processor instructions to reconfigurable processing units
Full Text
AUTHORS:
Bispo, J
;
Paulino, N
;
Cardoso, JMP
;
Ferreira, JC
;
PUBLISHED:
2013
,
SOURCE:
International Journal of Reconfigurable Computing,
VOLUME:
2013
INDEXED IN:
Scopus
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
55
TITLE:
Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems
AUTHORS:
Joao Bispo
;
Nuno Paulino
;
Joao M P Cardoso
;
Joao C Ferreira
;
PUBLISHED:
2013
,
SOURCE:
IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS,
VOLUME:
9,
ISSUE:
3
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
10
IN MY:
ORCID
|
DBLP
56
TITLE:
Hardware pipelining of runtime-detected loops
AUTHORS:
João Bispo
;
João M P Cardoso
;
José Monteiro
;
PUBLISHED:
2012
,
SOURCE:
2012 25th Symposium on Integrated Circuits and Systems Design, SBCCI 2012
in
25th Symposium on Integrated Circuits and Systems Design, SBCCI 2012, Brasilia, Brazil, August 30 - September 2, 2012
INDEXED IN:
Scopus
DBLP
CrossRef
:
1
IN MY:
ORCID
|
DBLP
57
TITLE:
From Instruction Traces to Specialized Reconfigurable Arrays
AUTHORS:
João Bispo
;
Nuno Miguel Cardanha Paulino
;
João M P Cardoso
;
João Canas Ferreira
;
PUBLISHED:
2011
,
SOURCE:
2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011
in
2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
INDEXED IN:
Scopus
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
58
TITLE:
Techniques for Dynamically Mapping Computations to Coprocessors
AUTHORS:
João Bispo
;
João M P Cardoso
;
PUBLISHED:
2011
,
SOURCE:
2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011
in
2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
INDEXED IN:
Scopus
DBLP
CrossRef
:
1
IN MY:
ORCID
|
DBLP
59
TITLE:
On identifying and optimizing instruction sequences for dynamic compilation
AUTHORS:
João Bispo
;
João M P Cardoso
;
PUBLISHED:
2010
,
SOURCE:
2010 International Conference on Field-Programmable Technology, FPT'10
in
Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China
INDEXED IN:
Scopus
DBLP
CrossRef
:
7
IN MY:
ORCID
|
DBLP
60
TITLE:
On Identifying Segments of Traces for Dynamic Compilation
AUTHORS:
João Bispo
;
João M P Cardoso
;
PUBLISHED:
2010
,
SOURCE:
20th International Conference on Field Programmable Logic and Applications, FPL 2010
in
International Conference on Field Programmable Logic and Applications, FPL 2010, August 31 2010 - September 2, 2010, Milano, Italy
INDEXED IN:
Scopus
DBLP
CrossRef
:
7
IN MY:
ORCID
|
DBLP
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