Leonel Augusto Pires Seabra Sousa


AuthID: R-000-93B

Confirmed Publications: 283



31
TITLE: Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations  Full Text
AUTHORS: Zarandi, AAE; Molahosseini, AS; Hosseinzadeh, M; Sorouri, S; Antao, S; Sousa, L ;
PUBLISHED: 2015, SOURCE: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOLUME: 23, ISSUE: 2
INDEXED IN: Scopus WOS DBLP
IN MY: ResearcherID | DBLP
32
TITLE: RNS Reverse Converters based on the New Chinese Remainder Theorem I
AUTHORS: Hector Pettenghi; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Circuits and Systems (ISCAS) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLUME: 2015-July
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: DBLP
33
TITLE: Run-time Machine Learning for HEVC/H.265 Fast Partitioning Decision
AUTHORS: Svetislav Momcilovic; Nuno Roma ; Leonel Sousa ; Ivan Milentijevic;
PUBLISHED: 2015, SOURCE: IEEE International Symposium on Multimedia (ISM) in 2015 IEEE INTERNATIONAL SYMPOSIUM ON MULTIMEDIA (ISM)
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: DBLP
34
TITLE: Stretching the limits of programmable embedded devices for public-key cryptography
AUTHORS: Martins, P; Sousa, L ;
PUBLISHED: 2015, SOURCE: 2nd Workshop on Cryptography and Security in Computing Systems, CS2 2015 in ACM International Conference Proceeding Series, VOLUME: 2015-January
INDEXED IN: Scopus DBLP CrossRef
IN MY: DBLP
35
TITLE: TOWARDS GPU HEVC INTRA DECODING: SEIZING FINE-GRAIN PARALLELISM
AUTHORS: Diego F de Souza; Aleksandar Ilic; Nuno Roma ; Leonel Sousa ;
PUBLISHED: 2015, SOURCE: IEEE International Conference on Multimedia & Expo (ICME) in 2015 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA & EXPO (ICME), VOLUME: 2015-August
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: DBLP
36
TITLE: A Flexible Architecture for Modular Arithmetic Hardware Accelerators based on RNS  Full Text
AUTHORS: Samuel Antao; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 76, ISSUE: 3
INDEXED IN: WOS DBLP CrossRef
IN MY: ORCID | ResearcherID | DBLP
37
TITLE: Accelerating Phylogenetic Inference on GPUs: an OpenACC and CUDA comparison PDF
AUTHORS: Lidia Kuan; Joao Neves; Frederico Pratas; Pedro Tomas; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: 2nd International Work-Conference on Bioinformatics and Biomedical Engineering (IWBBIO) in PROCEEDINGS IWBBIO 2014: INTERNATIONAL WORK-CONFERENCE ON BIOINFORMATICS AND BIOMEDICAL ENGINEERING, VOLS 1 AND 2
INDEXED IN: WOS DBLP
IN MY: DBLP
38
TITLE: An Efficient Scalable RNS Architecture for Large Dynamic Ranges  Full Text
AUTHORS: Pedro Miguens Matutino; Ricardo Chaves ; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, VOLUME: 77, ISSUE: 1-2
INDEXED IN: Scopus WOS DBLP CrossRef
IN MY: ORCID | ResearcherID | DBLP
39
TITLE: Arithmetic-Based Binary-to-RNS Converter Modulo {2n ±k} for jn-Bit Dynamic Range  Full Text
AUTHORS: Matutino, PM; Chaves, R ; Sousa, L ;
PUBLISHED: 2014, SOURCE: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, VOLUME: 23, ISSUE: 3
INDEXED IN: Scopus CrossRef: 8
IN MY: ORCID
40
TITLE: Cache-aware Roofline model: Upgrading the loft  Full Text
AUTHORS: Aleksandar Ilic ; Frederico Pratas; Leonel Sousa ;
PUBLISHED: 2014, SOURCE: Computer Architecture Letters, VOLUME: 13, ISSUE: 1
INDEXED IN: Scopus DBLP CrossRef
IN MY: ORCID | DBLP
Página 4 de 29. Total de resultados: 283.

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