Mário Pereira Véstias
AuthID: R-000-CZ3
91
TÃTULO: Decimal division using the newton-raphson method and radix-1000 arithmetic
AUTORES: Vestias, MP; Neto, HC;
PUBLICAÇÃO: 2013, FONTE: Embedded Systems Design with FPGAs
AUTORES: Vestias, MP; Neto, HC;
PUBLICAÇÃO: 2013, FONTE: Embedded Systems Design with FPGAs
INDEXADO EM: 
Scopus
Scopus92
TÃTULO: Very low resource table-based FPGA evaluation of elementary functions
AUTORES: Horacio C Neto; Mario P Vestias;
PUBLICAÇÃO: 2013, FONTE: International Conference on Reconfigurable Computing and FPGAs (ReConFig) in 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG)
AUTORES: Horacio C Neto; Mario P Vestias;
PUBLICAÇÃO: 2013, FONTE: International Conference on Reconfigurable Computing and FPGAs (ReConFig) in 2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG)
INDEXADO EM: 
WOS
WOS NO MEU: 
ORCID
ORCID93
TÃTULO: ANALYSIS OF MATRIX MULTIPLICATION ON HIGH DENSITY VIRTEX-7 FPGA
AUTORES: Wilson Jose; Ana Rita Silva; Horacio Neto; Mario Vestias;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
AUTORES: Wilson Jose; Ana Rita Silva; Horacio Neto; Mario Vestias;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID94
TÃTULO: A RECONFIGURABLE COMPUTING ARCHITECTURE USING MAGNETIC TUNNELING JUNCTION MEMORIES
AUTORES: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
AUTORES: Victor Silva; Jorge Fernandes; Mario Vestias; Horacio Neto;
PUBLICAÇÃO: 2013, FONTE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID95
TÃTULO: Decimal Division Using the Newton–Raphson Method and Radix-1000 Arithmetic
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2012, FONTE: Embedded Systems Design with FPGAs
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2012, FONTE: Embedded Systems Design with FPGAs
INDEXADO EM: 
CrossRef
CrossRef96
TÃTULO: Non-Volane Memory Circuits for FIMS and TAS Writing Techniques on Magnetic Tunnelling Junctions
AUTORES: Victor Silva; Mario P Vestias; Horacio C Neto; Jorge R Fernandes;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
AUTORES: Victor Silva; Mario P Vestias; Horacio C Neto; Jorge R Fernandes;
PUBLICAÇÃO: 2012, FONTE: 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) in 2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID97
TÃTULO: FPGA Implementation of IEEE 802.15.3c Receiver
AUTORES: Véstias, M; Sarmento, H;
PUBLICAÇÃO: 2012, FONTE: 2012 IEEE 16TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE)
AUTORES: Véstias, M; Sarmento, H;
PUBLICAÇÃO: 2012, FONTE: 2012 IEEE 16TH INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS (ISCE)
INDEXADO EM: WOS 
Handle
WOS Handle NO MEU: ORCID
ORCID98
TÃTULO: Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2010, FONTE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
AUTORES: Mário P Véstias; Horácio C Neto;
PUBLICAÇÃO: 2010, FONTE: Dynamic Reconfigurable Network-on-Chip Design - Innovations for Computational Processing and Communication
INDEXADO EM: CrossRef
CrossRef99
TÃTULO: Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment
AUTORES: Hugo Santos; Mario Vestias; Helena Sarmento;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
AUTORES: Hugo Santos; Mario Vestias; Helena Sarmento;
PUBLICAÇÃO: 2010, FONTE: 1st IEEE Latin American Symposium on Circuits and Systems (LASCAS) in 2010 FIRST IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS)
INDEXADO EM: WOS
WOS NO MEU: ORCID
ORCID100
TÃTULO: Area/performance improvement of NoC architectures
AUTORES: Véstias, MP; Neto, HC;
PUBLICAÇÃO: 2006, FONTE: RECONFIGURABLE COMPUTING: ARCHITECTURES AND APPLICATIONS, VOLUME: 3985
AUTORES: Véstias, MP; Neto, HC;
PUBLICAÇÃO: 2006, FONTE: RECONFIGURABLE COMPUTING: ARCHITECTURES AND APPLICATIONS, VOLUME: 3985
