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TITLE: COIN: Combinational Intelligent Networks
AUTHORS: Miranda, Igor D. S.; Arora, Aman; Susskind, Zachary; Souza, Josias S. A.; Jadhao, Mugdha P.; Villon, Luis A. Q.; Dutra, Diego L. C.; Lima, Priscila M. V.; Franca, Felipe M. G.; Breternitz, Mauricio, Jr.; John, Lizy K.;
PUBLISHED: 2023, SOURCE: 34th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP) in 2023 IEEE 34TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, ASAP, VOLUME: 2023-July
INDEXED IN: Scopus WOS
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TITLE: Efficiency and Scalability of Multi-Lane Capsule Networks (MLCN)
AUTHORS: Vanderson M do Rosario; Mauricio Breternitz; Edson Borin;
PUBLISHED: 2019, SOURCE: 31st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD) in 2019 31ST INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD 2019), VOLUME: 2019-October
INDEXED IN: Scopus WOS
3
TITLE: GPU triggered networking for intra-kernel communications
AUTHORS: LeBeane, M; Hamidouche, K; Benton, B; Breternitz, M; Reinhardt, SK; John, LK;
PUBLISHED: 2017, SOURCE: International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2017 in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2017
INDEXED IN: Scopus