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João Carlos Viegas Martins Bispo
AuthID:
R-000-6X6
Publications
Confirmed
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Document Type:
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Proceedings Paper (52)
Article (24)
Proceedings (4)
Book Chapter (1)
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Results:
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Confirmed Publications: 81
61
TITLE:
C and OpenCL Generation from MATLAB
AUTHORS:
Bispo, J
;
Reis, L
;
Cardoso, JMP
;
PUBLISHED:
2015
,
SOURCE:
30th ACM Symposium on Applied Computing (SAC)
in
30TH ANNUAL ACM SYMPOSIUM ON APPLIED COMPUTING, VOLS I AND II,
VOLUME:
13-17-April-2015
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
62
TITLE:
Techniques for efficient MATLAB-to-C compilation
AUTHORS:
João Bispo
;
Luís Reis
;
João M P Cardoso
;
PUBLISHED:
2015
,
SOURCE:
ARRAY@PLDI
INDEXED IN:
Scopus
DBLP
CrossRef
:
4
IN MY:
ORCID
|
DBLP
63
TITLE:
Transparent Acceleration of Program Execution Using Reconfigurable Hardware
Full Text
AUTHORS:
Paulino, N
;
Ferreira, JC
;
Bispo, J
;
Cardoso, JMP
;
PUBLISHED:
2015
,
SOURCE:
Conference on Design Automation Test in Europe (DATE)
in
2015 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE),
VOLUME:
2015-April
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
64
TITLE:
Multi-Target C Code Generation from MATLAB
AUTHORS:
João Bispo
;
Luís Reis
;
João M P Cardoso
;
PUBLISHED:
2014
,
SOURCE:
ARRAY@PLDI
INDEXED IN:
Scopus
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
65
TITLE:
Hardware pipelining of repetitive patterns in processor instruction traces
AUTHORS:
Bispo, J
;
Cardoso, JMP
;
Monteiro, J
;
PUBLISHED:
2013
,
SOURCE:
Journal of Integrated Circuits and Systems,
VOLUME:
8,
ISSUE:
1
INDEXED IN:
Scopus
IN MY:
ORCID
|
CIÊNCIAVITAE
66
TITLE:
The MATISSE MATLAB Compiler
AUTHORS:
Bispo, J
;
Pinto, P
;
Nobre, R
;
Carvalho, T
;
Cardoso, JMP
;
Diniz, PC
;
PUBLISHED:
2013
,
SOURCE:
11th IEEE International Conference on Industrial Informatics (INDIN)
in
2013 11TH IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL INFORMATICS (INDIN)
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
67
TITLE:
Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units
AUTHORS:
João Bispo
;
Nuno Miguel Cardanha Paulino
;
João M P Cardoso
;
João Canas Ferreira
;
PUBLISHED:
2013
,
SOURCE:
Int. J. Reconfigurable Comput.,
VOLUME:
2013
INDEXED IN:
Scopus
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
68
TITLE:
Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems
AUTHORS:
Bispo, J
;
Paulino, N
;
Cardoso, JMP
;
Ferreira, JC
;
PUBLISHED:
2013
,
SOURCE:
IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS,
VOLUME:
9,
ISSUE:
3
INDEXED IN:
Scopus
WOS
DBLP
CrossRef
:
11
IN MY:
ORCID
|
DBLP
69
TITLE:
Hardware pipelining of runtime-detected loops
Full Text
AUTHORS:
João Bispo
;
João M P Cardoso
;
José Monteiro
;
PUBLISHED:
2012
,
SOURCE:
2012 25th Symposium on Integrated Circuits and Systems Design, SBCCI 2012
in
SBCCI
INDEXED IN:
Scopus
DBLP
CrossRef
:
1
IN MY:
ORCID
|
DBLP
70
TITLE:
From Instruction Traces to Specialized Reconfigurable Arrays
AUTHORS:
João Bispo
;
Nuno Miguel Cardanha Paulino
;
João M P Cardoso
;
João Canas Ferreira
;
PUBLISHED:
2011
,
SOURCE:
ReConFig
INDEXED IN:
Scopus
DBLP
CrossRef
:
6
IN MY:
ORCID
|
DBLP
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