1
TITLE: High-voltage LDMOS transistors fully compatible with a deep-submicron 0.35 mu m CMOS process  Full Text
AUTHORS: Santos, PM ; Vitor Costa ; Gomes, MC; Beatriz Borges ; Mario Lanca;
PUBLISHED: 2007, SOURCE: MICROELECTRONICS JOURNAL, VOLUME: 38, ISSUE: 1
INDEXED IN: Scopus WOS CrossRef
2
TITLE: High-voltage NMOS design in fully implanted twin-well CMOS  Full Text
AUTHORS: Santos, PM ; Quaresma, H; Silva, AP; Lanca, M;
PUBLISHED: 2004, SOURCE: MICROELECTRONICS JOURNAL, VOLUME: 35, ISSUE: 9
INDEXED IN: Scopus WOS CrossRef
3
TITLE: Design of High-Voltage devices in a fully implanted twin-well CMOS process
AUTHORS: Santos, PM; Quaresma, H; Silva, AP; Lanca, M;
PUBLISHED: 2003, SOURCE: 33rd European Solid-State Device Research Conference in ESSDERC 2003: PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE
INDEXED IN: Scopus WOS CrossRef
4
TITLE: EIGHT-VALUE MODELLING TECHNIQUE FOR LOGIC SIMULATION OF TRANSMISSION GATES AND BUSES.
AUTHORS: Almeida, CB ; Lanca, MJA;
PUBLISHED: 1984, SOURCE: European Conference on Electronic Design Automation (EDA84). in IEE Conference Publication, ISSUE: 232
INDEXED IN: Scopus
5
TITLE: TIMING VERIFICATION OF LARGE DIGITAL CIRCUITS.
AUTHORS: Teixeira, IMC ; Lanca, MJA;
PUBLISHED: 1984, SOURCE: European Conference on Electronic Design Automation (EDA84). in IEE Conference Publication, ISSUE: 232
INDEXED IN: Scopus