Marcelino Bicho dos Santos
AuthID: R-000-A9P
31
TITLE: Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip Full Text
AUTHORS: Barros B Júnior; Rodriguez-Irago, M; Santos, MB; Teixeira, IC; Vargas, F; Teixeira, JP;
PUBLISHED: 2005, SOURCE: J Electron Test - Journal of Electronic Testing, VOLUME: 21, ISSUE: 4
AUTHORS: Barros B Júnior; Rodriguez-Irago, M; Santos, MB; Teixeira, IC; Vargas, F; Teixeira, JP;
PUBLISHED: 2005, SOURCE: J Electron Test - Journal of Electronic Testing, VOLUME: 21, ISSUE: 4
32
TITLE: Modeling and simulation of time domain faults in digital systems
AUTHORS: Barros, D; Vargas, F; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2004, SOURCE: 10th IEEE International On-Line Testing Symposium in 10TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS
AUTHORS: Barros, D; Vargas, F; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2004, SOURCE: 10th IEEE International On-Line Testing Symposium in 10TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS
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ResearcherID33
TITLE: RTL test pattern generation for high quality loosely deterministic BIST Full Text
AUTHORS: Santos, MB; Fernandes, JM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2003, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 03) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS
AUTHORS: Santos, MB; Fernandes, JM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2003, SOURCE: Design, Automation and Test in Europe Conference and Exhibition (DATE 03) in DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, PROCEEDINGS
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ResearcherID34
TITLE: Fault simulation using partially reconfigurable hardware
AUTHORS: Parreira, A; Teixeira, JP ; Pantelimon, A; Santos, MB; de Sousa, JT;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
AUTHORS: Parreira, A; Teixeira, JP ; Pantelimon, A; Santos, MB; de Sousa, JT;
PUBLISHED: 2003, SOURCE: 13th International Conference on Field-Programmable Logic and Applications (FPL 2003) in FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLUME: 2778
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ResearcherID35
TITLE: Self-checking and fault tolerance quality assessment using Fault Sampling
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2002, SOURCE: 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems in 17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS
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ResearcherID36
TITLE: RTL design validation, DFT and test pattern generation for high defects coverage
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: IEEE European Test Workshop (ETW 01) in ETW 2001: IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
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ResearcherID37
TITLE: Design and test of certifiable ASICs for safety-critical gas burners control
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
AUTHORS: Goncalves, FM; Santos, MB; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2001, SOURCE: 7th IEEE International On-Line Testing Workshop in SEVENTH IEEE INTERNATIONAL ON-LINE TESTING WORKSHOP, PROCEEDINGS
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ResearcherID38
TITLE: RTL-based functional test generation for high defects coverage in digital SOCs
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
AUTHORS: Santos, MB; Goncalves, FM; Teixeira, IC; Teixeira, JP;
PUBLISHED: 2000, SOURCE: IEEE European Test Workshop in IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS
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ResearcherID39
TITLE: Testability issues in the CMS ECAL upper-level readout and trigger system
AUTHORS: Almeida, CB; Teixeira, IC; Teixeira, JP; Varela, J; Augusto, J ; Santos, M; Cardoso, N;
PUBLISHED: 1999, SOURCE: 5th Workshop on Electronics for LHC Experiments in PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS
AUTHORS: Almeida, CB; Teixeira, IC; Teixeira, JP; Varela, J; Augusto, J ; Santos, M; Cardoso, N;
PUBLISHED: 1999, SOURCE: 5th Workshop on Electronics for LHC Experiments in PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS
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ResearcherID40
TITLE: Low-energy BIST design: Impact of the LFSR TPG parameters on the weighted switching activity
AUTHORS: Girard, P; Guiller, L; Figueras, J; Manich, S; Teixeira, P; Santos, M;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI
AUTHORS: Girard, P; Guiller, L; Figueras, J; Manich, S; Teixeira, P; Santos, M;
PUBLISHED: 1999, SOURCE: 1999 IEEE International Symposium on Circuits and Systems (ISCAS 99) in ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI
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