Hector Pettenghi Roldan
AuthID: R-000-XX8
11
TITLE: Using multi-threshold threshold gates in RTD-based logic design: A case study Full Text
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: Microelectronics Journal, VOLUME: 39, ISSUE: 2
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: Microelectronics Journal, VOLUME: 39, ISSUE: 2
12
TITLE: A novel contribution to the RTD-based threshold logic family
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2008, SOURCE: 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 in Proceedings - IEEE International Symposium on Circuits and Systems
13
TITLE: Non return mobile logic family
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2007, SOURCE: 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 in Proceedings - IEEE International Symposium on Circuits and Systems
INDEXED IN: 
Scopus
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ORCID
ORCID14
TITLE: Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Circuits and Systems II: Express Briefs, VOLUME: 53, ISSUE: 5
15
TITLE: Increased logic functionality of clocked series-connected RTDS
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi Roldan, H;
PUBLISHED: 2006, SOURCE: IEEE Transactions on Nanotechnology, VOLUME: 5, ISSUE: 5
16
TITLE: Single phase clock scheme for mobile logic gates Full Text
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2006, SOURCE: Electronics Letters, VOLUME: 42, ISSUE: 24
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2006, SOURCE: Electronics Letters, VOLUME: 42, ISSUE: 24
17
TITLE: Self-latching operation limits for MOBILE circuits
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2006, SOURCE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
AUTHORS: Quintana, JM; Avedillo, MJ; Pettenghi, H;
PUBLISHED: 2006, SOURCE: ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems in Proceedings - IEEE International Symposium on Circuits and Systems
INDEXED IN: Scopus
Scopus IN MY: ORCID
ORCID18
TITLE: Logic models supporting the design of MOBILE-based RTD circuits Full Text
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2005, SOURCE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
AUTHORS: Avedillo, MJ; Quintana, JM; Pettenghi, H;
PUBLISHED: 2005, SOURCE: IEEE 16th International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2005 in Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
19
TITLE: New circuit topology for logic gates based on RTDs
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 5th IEEE Conference on Nanotechnology in 2005 5th IEEE Conference on Nanotechnology, VOLUME: 1
20
TITLE: Novel improved RTD-based implementation of multi-threshold logic gates
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
AUTHORS: Pettenghi, H; Avedillo, MJ; Quintana, JM;
PUBLISHED: 2005, SOURCE: 2005 PhD Research in Microelectronics and Electronics Conference in 2005 PhD Research in Microelectronics and Electronics - Proceedingsof the Conference, VOLUME: I
