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TITLE: Design and Validation of Configurable Online Aging Sensors in Nanometer-Scale FPGAs
AUTHORS: Maria D Valdes Pena; Judit F Fernandez Freijedo; Maria J M Moure Rodriguez; Juan J Rodriguez Andina; Jorge Semião ; Isabel Maria C Cacho Teixeira ; Joao Paulo C Cacho Teixeira ; Fabian Vargas;
PUBLISHED: 2013, SOURCE: IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOLUME: 12, ISSUE: 4
INDEXED IN: Scopus WOS CrossRef
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TITLE: AGING MONITORING WITH LOCAL SENSORS IN FPGA-BASED DESIGNS
AUTHORS: Leong, C; Jorge Semião ; Teixeira, IC; Santos, MB; Teixeira, JP; Valdes, M; Freijedo, J; Rodriguez Andina, JJ; Vargas, F;
PUBLISHED: 2013, SOURCE: 23rd International Conference on Field Programmable Logic and Applications (FPL) in 2013 23RD INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL 2013) PROCEEDINGS
INDEXED IN: Scopus WOS CrossRef
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TITLE: Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits  Full Text
AUTHORS: Judit F Freijedo; Jorge Semião ; Juan J Rodriguez Andina; Fabian Vargas; Isabel C Teixeira ; Paulo Teixeira, JP ;
PUBLISHED: 2012, SOURCE: JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, VOLUME: 28, ISSUE: 4
INDEXED IN: Scopus WOS CrossRef
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TITLE: Modeling the effect of process variations on the timing response of nanometer digital circuits
AUTHORS: Freijedo, J; Jorge Semião ; Rodriguez Andina, JJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: 12th IEEE Latin-American Test Workshop, LATW 2011 in LATW 2011 - 12th IEEE Latin-American Test Workshop
INDEXED IN: Scopus CrossRef
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TITLE: Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects
AUTHORS: Valdes, M; Freijedo, J; Moure, MJ; Rodriguez Andina, JJ; Jorge Semião ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: 12th IEEE Latin-American Test Workshop, LATW 2011 in LATW 2011 - 12th IEEE Latin-American Test Workshop
INDEXED IN: Scopus CrossRef
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TITLE: Performance failure prediction using built-in delay sensors in FPGAs
AUTHORS: Bexiga, V; Leong, C; Jorge Semião ; Ic Teixeira ; Teixeira, JP ; Valdes, M; Freijedo, J; Rodriguez Andina, JJ; Vargas, F;
PUBLISHED: 2011, SOURCE: 21st International Conference on Field Programmable Logic and Applications, FPL 2011 in Proceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
INDEXED IN: Scopus CrossRef
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TITLE: Lower V DD operation of FPGA-based digital circuits through delay modeling and time borrowing
AUTHORS: Freijedo, J; Valdes, MD; Costas, L; Moure, MJ; Rodriguez Andina, JJ; Jorge Semião ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2011, SOURCE: Journal of Low Power Electronics, VOLUME: 7, ISSUE: 2
INDEXED IN: Scopus CrossRef
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TITLE: Delay modeling for power noise-aware design in Spartan-3A FPGAS
AUTHORS: Freijedo, JF; Valdes, MD; Moure, MJ; Costas, L; Rodriguez Andina, JJ; Jorge Semião ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2010, SOURCE: 6th Southern Programmable Logic Conference, SPL 2010 in 6th Southern Programmable Logic Conference, SPL 2010 - Proceedings
INDEXED IN: Scopus CrossRef
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TITLE: Impact of power supply voltage variations on FPGA-based digital systems performance
AUTHORS: Freijedo, J; Costas, L; Jorge Semião ; Rodriguez Andina, JJ; Moure, MJ; Vargas, F; Teixeira, IC ; Teixeira, JP ;
PUBLISHED: 2010, SOURCE: Journal of Low Power Electronics, VOLUME: 6, ISSUE: 2
INDEXED IN: Scopus CrossRef
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TITLE: Measuring Clock-Signal Modulation Efficiency for Systems-on-Chip in Electromagnetic Interference Environment
AUTHORS: Jorge Semião ; Freijedo, J; Moraes, M; Mallmann, M; Antunes, C ; Benfica, J; Vargas, F; Santos, M ; Teixeira, IC ; Rodriguez Andina, JJR; Teixeira, JP ; Lupi, D; Gatti, E; Garcia, L; Hernandez, F;
PUBLISHED: 2009, SOURCE: 10th Latin American Test Workshop in LATW: 2009 10TH LATIN AMERICAN TEST WORKSHOP
INDEXED IN: Scopus WOS CrossRef
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